Debouncing calculations for Keypad

We have alluded to the problem of bouncing in mechanical switches in chap. ??. As the keypad is constructed out of many mechanical switches, it also suffers from the debouncing problem.

Typical keypress duration is 100-200 ms. To be on the safe side, we will assume that the keypress duration is 50 ms.

Debounce time of a mechanical switch is 20ms. This means that after we detect a keypress, we must wait 20ms for the keypad output to stabilize, before we attempt to read the data at the start of the keypad output.. Also because of bouncing, it may take 20 ms after pressing down the key to discover that the key is pressed. This leaves 10ms to read the key.

If we scan the keypad with 1 KHz clock, we scan a row for every 1 ms. Hence a single scan of a 4x4 keypad will take 4 ms. The scan of a 2x2 keypad will take 2 ms.

After the keypad interface detects a keypress, it is required to wait for the keypad output to be stabilized before it exports the keypress data to the rest of hardware. In a 4x4 keyboard, this is 6 scans (24 ms). In a 2x2 keypad, that is 11 scans (22 ms).

Basic schematic of the 4x4 Keypad

Connecting Keypad to the Processor

The sequence 1110 -> 1101 -> 1011 -> 011 -> 1110 -> 1101 -> etc is sent to the port X1-X4 by the CPU. Keypresses is read from the port Y1-Y4 by the processor.

Some References

https://stackoverflow.com/questions/22505698/what-is-a-typical-keypress-duration

https://appcodelabs.com/read-matrix-keypad-using-arduino

https://my.eng.utah.edu/~cs5780/debouncing.pdf

Keypad interface in verilog

We will design a keypad interface for a 2x2 keypad.

module keypad( 
output reg [1:0] rowwrite, 
input [1:0] colread,  
output reg [15:0] dataout,
input readyclr,
input a0,
input clk);

reg [1:0] keyread;
reg rowpressed;
reg [1:0] rows;
wire keypadpressed;
reg [41:0] stable;
wire stablefor21scans;
reg [25:0] clk1;
reg [15:0] data;
reg [1:0] readytemp_acc;
reg ready;


always @(posedge clk)
    clk1 <= clk1 + 1;   //14th bit generates 1kHz clock..

always@(posedge clk1[14])
    rowwrite <= {rowwrite[0],rowwrite[1]};

always @*
    if (rowwrite==2'b10 && colread==2'b10)
   begin
        keyread=4'h1;
      rowpressed=1'b1;
   end
   else if (rowwrite==2'b10 && colread==2'b01)
   begin
        keyread=4'h2;
      rowpressed=1'b1;
   end
   else if (rowwrite==2'b01 && colread==2'b10)
   begin
      keyread=4'h3;
      rowpressed=1'b1;
   end
   else if (rowwrite==2'b01 && colread==2'b01)
   begin
      keyread=4'h0;
      rowpressed=1'b1;
   end
   else
   begin
      keyread=4'hf;
      rowpressed=1'b0;
   end


always @(posedge clk1[14])
    begin
         rows <= {rows[0],rowpressed};  //accumulates the results of the row scan..
         if (rowpressed == 1'b1)
              data <= keyread;
    end

assign keypadpressed =| rows;  //if the keypad is pressed, keypadpressed becomes true.


//keypadpressed must remain stable for 21 scans, or 42 clock cycles
//in order to get rid of bouncing. When this occurs, stablefor21scans becomes 
//true and we can be sure that everything is stable..
always @(posedge clk1[14])
    stable <= {stable[40:0],keypadpressed}; 

assign stablefor21scans =& stable;

//readytemp signal is too slow for cpu, as it is generated by a 1kHz clock. Once set, cpu cannot reset it
//for 0.001 sec, which will create problems.. Hence, we generate an 50 MHz version of readytemp signal,
//called ready signal. The ready signal can be reset instantly via the readyclr signal, coming from the 
//address decode logic.
always @(posedge clk)
    readytemp_acc <= {readytemp_acc[0], stablefor21scans};

always @(posedge clk)
    if(!readytemp_acc[1] && readytemp_acc[0])
        ready <= 1;
    else if(readyclr)  //reads data register. a2 must be 0.  //bunu yukarı al..
        ready <= 0;

//depending on address[2], the keypad sends either its data or its status register to the cpu.
always @*
    if (!a0)
        dataout = {12'b0,data}; //a0=0 data register
    else
        dataout = {13'b0, ready, 2'b0};  //a2=1 status register  


 initial begin
        rowwrite = 2'b01;
        ready = 1'b0;
 end

endmodule

https://legacy.gitbook.com/book/microprocessors/deneme/edit#/edit/master/basic-i/o-2-keypad-and-debouncing.md?_k=gnqctn

EXCERCISES

  1. Design a system in which the output of keypad is directly fed into the 4-digit seven segment display. When somebody presses a key that key will be displayed in 7-seg display. When the key is released, nothing will be displayed..
  2. Redesign the system above in such a way that a keypress will continue to be displayed untill a new keypress.

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